Intel Triple-Speed Ethernet Agilex FPGA IP Design Example
Tsamba Loyambira Yoyambira
Triple-Speed Ethernet Intel® FPGA IP ya Intel Agilex™ imapereka kuthekera kopanga kapangidwe kakale.amples pamasinthidwe osankhidwa, omwe amakulolani:
- Phatikizani kapangidwe kake kuti muthe kuyerekeza kugwiritsa ntchito dera la IP komanso nthawi yake.
- Tsanzirani kapangidwe kake kuti mutsimikizire magwiridwe antchito a IP poyerekezera.
- Yesani kapangidwe kazinthu zamagetsi pogwiritsa ntchito Intel Agilex I-Series Transceiver-SoC Development Kit.
- Mukapanga zojambula zakaleampndi, mkonzi wa parameter amangopanga files zofunika kuyerekezera, kusonkhanitsa, ndi kuyesa mapangidwe mu hardware.
Zindikirani: Chithandizo cha Hardware sichikupezeka mu Intel Quartus® Prime Pro Edition Software version 22.3.
Development Stagndi za Design Example
Zindikirani: Mu Intel Quartus Prime Pro Edition Software version 22.3, chigamba chimafunika kupewa kulephera koyerekeza pa kapangidwe kakaleample. Kuti mumve zambiri, onani ulalo wa KDB: Chifukwa chiyani kuyerekezera kumalephera pa Triple-Speed Ethernet Intel FPGA IP Multiport Design Ex.ample?.
Zambiri Zowonjezera
Chifukwa chiyani kuyerekezera kumalephera pa Triple-Speed Ethernet Intel® FPGA IP Multiport Design Example?.
Kapangidwe ka Kalozera
Kapangidwe ka Triple-Speed Ethernet Intel FPGA IP example file akalozera ali ndi zotsatirazi zopangidwa files kwa 10/100/1000 Multiport Ethernet MAC Design Example yokhala ndi 1000BASE-X/SGMII PCS ndi PMA Yophatikizidwa
- Kukonzekera kwa hardware ndi kuyesa files (kapangidwe ka hardware example) zili muample_dir>/hardware_test_design.
- Kayeseleledwe files (testbench for simulation only) ali mkatiample_dir>/example_testbench.
- Kapangidwe kophatikiza kokha example ili muample_dir>/ compilation_test_design.
- Mayeso ophatikizika ndi mapangidwe a mayeso a Hardware amagwiritsidwa ntchito files muample_dir>/ex_tse/common.
Kapangidwe ka Kalozera wa Mapangidwe Example
Table 1. Triple-Speed Ethernet Intel FPGA IP Testbench File Kufotokozera
| Directory/File | Kufotokozera |
| Testbench ndi Simulation Files | |
| <design_example_dir>/example_testbench/basic_avl_tb_top_mac_pcs.sv | Testbench yapamwamba kwambiri file. Testbench imayambitsa DUT ndikuyendetsa ntchito za Verilog HDL kuti apange ndi kuvomereza mapaketi. |
| Zolemba za Testbench | |
| <design_example_dir>/example_testbench/ run_vsim_mac_pcs.sh | The ModelSim script kuyendetsa testbench. |
| anapitiriza… | |
| Directory/File | Kufotokozera |
| <design_example_dir>/example_testbench/ run_vcs_mac_pcs.sh | Zolemba za Synopsy* VCS zoyendetsa testbench. |
| <design_example_dir>/example_testbench/ run_vcsmx_mac_pcs.sh | Synopsys VCS MX script (yophatikiza Verilog HDL ndi System Verilog yokhala ndi VHDL) kuyendetsa testbench |
| <design_example_dir>/example_testbench/ run_xcelium_mac_pcs.sh | Xcelium* script kuti muyendetse testbench. |
Table 2. Triple-Speed Ethernet Intel FPGA IP Hardware Design Example File Kufotokozera
| Directory/File | Kufotokozera |
| <design_example_dir>/hardware_test_design/ altera_eth_tse_hw.qpf | Intel Quartus Prime Project file. |
| <design_example_dir>/hardware_test_design/ altera_eth_tse_hw.qsf | Zokonda pa Intel Quartus Prime project file. |
| <design_example_dir>/hardware_test_design/ altera_eth_tse_hw.sdc | Zolepheretsa Zopanga za Synopsys files. Mutha kukopera ndi kusintha izi files pakupanga kwanu kwa Intel Stratix® 10. |
| <design_example_dir>/hardware_test_design/ altera_eth_tse_hw.v | Mapangidwe apamwamba a Verilog HDL example file. |
| <design_example_dir>/hardware_test_design/ common/ | Mapangidwe a Hardware exampthandizo files. |
Kupanga Design Example
Njira Yopangira Mapangidwe Example
Example Design Tab mu Triple-Speed Ethernet Intel FPGA IP Parameter Editor
Tsatirani izi kuti mupange mawonekedwe a Hardware example ndi testbench:
- Mu pulogalamu ya Intel Quartus Prime Pro Edition, dinani File ➤ Project Wizard Watsopano kuti apange polojekiti yatsopano ya Quartus Prime, kapena File ➤ Tsegulani Project kuti mutsegule pulojekiti yomwe ilipo ya Quartus Prime. Wizard imakulimbikitsani kuti mutchule chipangizo.
- Sankhani banja la chipangizo cha Intel Agilex ndikusankha chipangizo chomwe chili ndi LVDS.
- Dinani Malizani kuti mutseke wizard.
- M'gulu la IP, pezani ndikusankha Interface Protocol ➤ Ethernet ➤ 1G Multirate
- Ethernet ➤ Triple-Speed Ethernet Intel FPGA IP. Zenera la New IP Variation likuwonekera.
- Tchulani dzina lapamwamba pakusintha kwanu kwa IP. Mkonzi wa parameter amasunga zosintha za IP mu a file dzina .ip.
- Dinani Chabwino. Zosintha za parameter zikuwoneka.
- Kupanga chopanga example, sankhani zojambula zakaleamplembani preset kuchokera ku Presets library ndikudina Ikani. Mukasankha mapangidwe, makinawo amangodzaza magawo a IP pamapangidwewo. Mkonzi wa parameter amangoyika magawo ofunikira kuti apange mawonekedwe a example. Osasintha magawo omwe adakhazikitsidwa kale pa tabu ya IP.
- Kwa Exampndi Design Files, kusankha Kayeseleledwe njira kupanga testbench, kapena kaphatikizidwe njira kupanga hardware kapangidwe example.
- Zindikirani: Muyenera kusankha chimodzi mwazosankha kuti mupange zojambula zakaleample.
- Pa Eksample Design tabu, pansi pa Generated HDL Format, sankhani Verilog HDL kapena VHDL.
- Pansi pa Target Development Kit, sankhani Agilex I-Series Transceiver-SoC Development Kit (AGIB027R31B1E2VR0) kapena sankhani Palibe
- Dinani Eksample Design: "example_design" batani. Sankhani Exampzenera la Design Directory likuwonekera.
- Ngati mukufuna kusintha kapangidwe exampnjira ya chikwatu kapena dzina kuchokera pazosintha zomwe zikuwonetsedwa (eth_tse_0_example_design), sakatulani njira yatsopano ndikulemba mawonekedwe atsopanoample directory name (ample_dir>).
- Dinani OK.
Design Exampndi Parameters
Parameters mu Exampndi Design Tab
| chizindikiro | Kufotokozera |
| Sankhani Design | Zopezeka kaleample amapangira zoikamo za IP parameter. |
| Exampndi Design Files | The files kuti apange magawo osiyanasiyana a chitukuko.
• Kuyerekezera—kumapanga zofunika files poyerekezera ndi exampkupanga. • Kaphatikizidwe—kumapanga kaphatikizidwe files. Gwiritsani ntchito izi files kuti apange mapangidwe mu pulogalamu ya Intel Quartus Prime Pro Edition yoyesa ma hardware ndi kusanthula nthawi. |
| kupanga File mtundu | Chithunzi cha RTL files yoyerekeza - Verilog kapena VHDL. |
| Sankhani Board | Zida zothandizira kuti zitheke kupanga mapangidwe. Mukasankha gulu lachitukuko la Intel FPGA, the Chida Cholowera ndi yomwe ikufanana ndi chipangizo pa Development Kit.
Ngati menyuyi palibe, palibe bolodi lothandizira pazosankha zomwe mwasankha. Agilex I-Series Transceiver-SoC Development Kit: Njira iyi imakulolani kuti muyese zojambula zakaleample pa zida zosankhidwa za Intel FPGA IP. Izi njira basi amasankha Chida Cholowera kuti mufanane ndi chipangizocho pa Intel FPGA IP development kit. Ngati kubwereza kwa board yanu kuli ndi giredi yosiyana ya chipangizo, mutha kusintha chipangizo chomwe mukufuna. palibe: Izi sizimaphatikizapo mbali za hardware za kapangidwe kakaleample. |
Kutengera Triple-Speed Ethernet Intel FPGA IP Design Exampndi Testbench
Njira Yotsanzira Eksampndi Testbench
Tsatirani izi kuti muyesere testbench:
- Sinthani ku chikwatu choyeserera cha testbenchample_dir>/example_testbench.
- Yendetsani script yoyeserera ya simulator yothandizidwa yomwe mungasankhe. Zolembazo zimaphatikiza ndikuyendetsa testbench mu simulator. Onani pa tebulo Masitepe Kuti Mutsanzire Testbench.
Njira Zotsanzira Testbench
| pulogalamu yoyeseza | malangizo |
| ModelSim* | Mu mzere wolamula, lembani vsim -do run_vsim_mac_pcs.do. Ngati mukufuna kuyerekezera popanda kubweretsa ModelSim GUI, lembani vsim -c -do run_vsim_mac_pcs.do. |
| Ma Synopsys VCS*/ VCS MX | Mu mzere wolamula, lembani sh run_vcs_mac_pcs.sh kapena sh run_vcsmx_mac_pcs.sh. |
| Xcelium | Mu mzere wolamula, lembani sh run_xcelium_mac_pcs.sh. |
- Unikani zotsatira. Testbench yopambana imatumiza mapaketi khumi, imalandira mapaketi omwewo, ndikuwonetsa uthenga wotsatira.
Kupanga ndi Kukonza Design Exampndi mu Hardware
Kupanga kapangidwe ka hardware example ndikuikonza pa chipangizo chanu cha Intel Agilex, tsatirani izi:
- Onetsetsani kuti hardware kapangidwe example generation yatha.
- Mu pulogalamu ya Intel Quartus Prime Pro Edition, tsegulani pulojekiti ya Intel Quartus Primeample_dir>/hardware_test_design/ altera_eth_tse_hw.qpf.
- Pa Processing menyu, dinani Start Compilation.
- Pambuyo pophatikiza bwino, a.sof file ikupezeka muample_dir>/hardwarde_test_design directory
10/100/1000 Multiport Ethernet MAC Design Example yokhala ndi 1000BASE-X/SGMII PCS ndi PMA Yophatikizidwa
Mapangidwe awa example akuwonetsa yankho la Ethernet pazida za Intel Agilex pogwiritsa ntchito Triple-Speed Ethernet IP. Mutha kupanga mapangidwe kuchokera ku Example Design tabu ya Triple-Speed Ethernet IP parameter editor. Kupanga kapangidwe exampLero, choyamba muyenera kukhazikitsa magawo amitundu yosiyanasiyana ya IP yomwe mukufuna kupanga pamapeto anu. Kupanga kapangidwe example akupanga kopi ya IP. The testbench ndi hardware design exampndikugwiritsa ntchito kopi ya IP ngati chipangizo chomwe chikuyesedwa (DUT). Ngati simukuyika ma parameter a DUT kuti agwirizane ndi zomwe zili patsamba lanu, kapangidwe kakaleampzomwe mumapanga sizigwiritsa ntchito kusintha kwa IP komwe mukufuna.
Mawonekedwe
- Amapanga kapangidwe kakaleample ya Triple-Speed Ethernet Multiport Ethernet MAC yopanda Internal FIFO ndi PCS yokhala ndi LVDS I/O pogwiritsa ntchito njira zambiri zogawana FIFO.
- Amapanga magalimoto pamsewu wotumizira ndikutsimikizira zomwe adalandira kudzera pa transceiver LVDS I / O loopback yakunja.
- Tx ndi RX serial kunja loopback mode kudzera pa LVDS I/O.
- Imathandizira loopback yakunja yokha.
- Imathandiza madoko anayi okha.
Zida za Hardware ndi Mapulogalamu
- Intel imagwiritsa ntchito zida ndi mapulogalamu otsatirawa kuyesa kapangidwe kakaleamplembani mu Linux system:
- Pulogalamu ya Intel Quartus Prime Pro Edition
- ModelSim, VCS, VCS MX, ndi Xcelium simulators
Kufotokozera Kantchito
Zida Zopangira
| chigawo chimodzi | Kufotokozera |
| Triple-Speed Ethernet Intel FPGA IP | Triple-Speed Ethernet Intel FPGA IP (altera_eth_tse) imakhazikitsidwa ndi kasinthidwe kotsatiraku:
• Masinthidwe Apakati: - Kusintha kwa Core: 10/100/1000Mb Efaneti MAC ndi 1000BASE-X/SGMII ma PC - Gwiritsani ntchito FIFO yamkati: Osasankhidwa - Chiwerengero cha madoko: 4 - Mtundu wa transceiver: LVDS I/O • Zosankha za MAC: - Yambitsani thandizo la MAC 10/100 theka la duplex: Yasankhidwa - Yambitsani kuzungulira kwanuko pa MII/GMII: Yasankhidwa - Yambitsani ma adilesi owonjezera a MAC a unicast: Osasankhidwa - Phatikizani zowerengera: Yasankhidwa - Yambitsani ma 64-bit statistics byte counters: Osasankhidwa - Phatikizani ma hashtable multicast: Osasankhidwa - Gwirizanitsani mitu ya paketi kumalire a 32-bit: Osasankhidwa - Yambitsani kuwongolera kwathunthu kwa duplex: Yasankhidwa - Yambitsani kuzindikira kwa VLAN: Osasankhidwa - Yambitsani kuzindikira paketi yamatsenga: Yasankhidwa - Phatikizani gawo la MDIO (MDC/MDIO): Yasankhidwa - Host wotchi yogawa: 50 • Nthawiamp Zosankha: - Yambitsani nthawiampIng: Osasankhidwa • Zosankha za PCS/Transceiver: - Yambitsani mlatho wa SGMII: Yasankhidwa |
| Client Logic | Amapanga ndi kuyang'anira mapaketi otumizidwa kapena kulandiridwa kudzera pa IP. |
| Ethernet Traffic Controller | Imayendetsedwa kudzera pa Avalon® memory-mapped interface. |
| JTAG kupita ku Avalon memory-map interface Address Decoder | Sinthani JTAG Zizindikiro za mawonekedwe a Avalon memory-mapped. |
Wotchi ndi Bwezerani Zizindikiro
| Chizindikiro | malangizo | m'lifupi | Kufotokozera |
| ref_clk | Lowetsani | 1 | Ma Drives amalembetsa wotchi yolowera komanso wotchi ya mawonekedwe a MAC FIFO. Khazikitsani wotchi ku 100 MHz. |
| iopll_refclk | Lowetsani | 1 | Wotchi ya 125 MHz ya mawonekedwe a 1.25 Gbps serial LVDS I/O. |
kayeseleledwe
Mayeso oyeserera amachita izi:
- Amayamba kupanga example yokhala ndi liwiro la 1G.
- Imakonza zolembetsa za Triple-Speed Ethernet MAC ndi PCS.
- Kudikirira mpaka kutsimikizira kwa muyeso chizindikiro chovomerezeka.
- Amatumiza mapaketi omwe si a PTP ku doko 0.
- MAC RX port 0 imatumiza mapaketi omwe alandilidwa ku doko la MAC TX 1.
Testbench
Chojambula cha Block cha Design Example Multiport 10/100/1000Mb Efaneti MAC yokhala ndi 1000BASE-X/SGMII PCS yokhala ndi LVDS I/O Simulation Testbench
Zotsatira Zoyeserera za VCS Simulator
Mbiri Yokonzanso Document for the Triple-Speed Ethernet Intel FPGA IP Intel Agilex Design Exampndi User Guide
| Mtundu Wolemba | Intel Quartus Prime Version | Mtundu wa IP | kusintha |
| 2022.12.09 | 22.3 | 21.1.0 | Kumasulidwa koyambirira. |
Zolemba / Zothandizira
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Intel Triple-Speed Ethernet Agilex FPGA IP Design Example [pdf] Wogwiritsa Ntchito Triple-Speed Ethernet Agilex FPGA IP Design Example, Triple-Speed, Ethernet Agilex FPGA IP Design Exampndi, IP Design Example |
